Coverage for tests/unit_tests/common/test_common_utils.py: 100%
66 statements
« prev ^ index » next coverage.py v7.17.2, created at 2026-11-07 05:08 +0000
« prev ^ index » next coverage.py v7.17.2, created at 2026-11-07 05:08 +0000
1# This file is part of the Apio project
2# (C) 2016-present FPGAwars
3# Project authors:
4# * Jesús Arroyo (Jesus89) (2016-2019)
5# * Juan Gonzalez (obijuan) (2019-2024)
6# * The Apio Team (2024-present)
7# License: GPLv2
9"""Test for common_utils.py."""
11from pathlib import Path
12from os.path import join
13from apio.common.common_util import (
14 sort_files,
15 file_sort_key_func,
16 is_source_file,
17 has_testbench_name,
18 get_project_source_files,
19)
22def test_file_sort_compare_func():
23 """Test"""
25 # -- A shortcut to the tested key function.
26 key = file_sort_key_func
28 assert key("a") == key("a")
29 assert key("A") == key("a")
30 assert key("a") == key("A")
31 assert key("A") == key("A")
33 assert key("a") < key("b")
34 assert key("A") < key("b")
35 assert key("a") < key("B")
36 assert key("A") < key("B")
38 assert key("b") > key("a")
39 assert key("B") > key("a")
40 assert key("b") > key("A")
41 assert key("B") > key("A")
43 assert key("b") < key("a/a")
44 assert key("a/a") > key("b")
46 assert key("a/a") < key("a/b")
47 assert key("a/b") > key("a/ ")
49 assert key(Path("a")) < key(Path("b"))
50 assert key(Path("b")) > key(Path("A"))
51 assert key(Path("a")) == key(Path("a"))
52 assert key(Path("B")) > key(Path("a"))
55def test_sort_files():
56 """Test the sort_files function."""
58 assert sort_files([]) == []
60 assert sort_files(
61 [
62 "a/a/c",
63 "a/b/a",
64 "a/a",
65 "a/b",
66 "a",
67 "b",
68 "c",
69 "A/C",
70 "B/D",
71 ]
72 ) == [
73 "a",
74 "b",
75 "c",
76 "a/a",
77 "a/b",
78 "A/C",
79 "a/a/c",
80 "a/b/a",
81 "B/D",
82 ]
85def test_is_source_file():
86 """Tests the is_source_file() function."""
88 # -- Verilog and system-verilog source names,
89 assert is_source_file("aaa.v")
90 assert is_source_file("bbb/aaa.v")
91 assert is_source_file("bbb\\aaa.v")
92 assert is_source_file("aaatb.v")
93 assert is_source_file("aaa_tb.v")
94 assert is_source_file("aaa.sv")
95 assert is_source_file("bbb\\aaa.sv")
96 assert is_source_file("aaa_tb.sv")
98 # -- Non verilog source names, system-verilog included.
99 assert not is_source_file("aaatb.vv")
100 assert not is_source_file("aaatb.V")
101 assert not is_source_file("aaa_tb.vh")
104def test_has_testbench_name():
105 """Tests the test_is_testbench() function."""
107 # -- Testbench names
108 assert has_testbench_name("aaa_tb.v")
109 assert has_testbench_name("aaa_tb.out")
110 assert has_testbench_name("bbb/aaa_tb.v")
111 assert has_testbench_name("bbb\\aaa_tb.v")
112 assert has_testbench_name("aaa__tb.v")
113 assert has_testbench_name("Aaa__Tb.v")
114 assert has_testbench_name("bbb/aaa_tb.v")
115 assert has_testbench_name("bbb\\aaa_tb.v")
117 # -- Non testbench names.
118 assert not has_testbench_name("aaatb.v")
119 assert not has_testbench_name("aaa.v")
122def test_get_source_files(apio_runner):
123 """Tests the get_source_files() method."""
125 with apio_runner.in_sandbox():
127 # -- Make files verilog src names (out of order)
128 Path("bbb.v").touch()
129 Path("aaa.sv").touch()
131 # -- Make files with testbench names (out of order)
132 Path("ccc_tb.v").touch()
133 Path("aaa_tb.sv").touch()
135 # -- Make files with non related names.
136 Path("ddd.vh").touch()
137 Path("eee.vlt").touch()
139 # -- Make files in subdirectories.
140 Path("subdir1").mkdir()
141 Path("subdir2").mkdir()
142 Path("subdir1/eee.v").touch()
143 Path("subdir2/eee_tb.v").touch()
145 # -- Invoked the tested method.
146 srcs, testbenches = get_project_source_files()
148 # -- Verify results.
149 assert srcs == ["aaa.sv", "bbb.v", join("subdir1", "eee.v")]
150 assert testbenches == [
151 "aaa_tb.sv",
152 "ccc_tb.v",
153 join("subdir2", "eee_tb.v"),
154 ]