Coverage for tests/unit_tests/common/test_common_utils.py: 100%

1"""Test for common_utils.py.""" 

2 

3from pathlib import Path 

4from os.path import join 

5from apio.common.common_util import ( 

6 sort_files, 

7 file_sort_key_func, 

8 is_source_file, 

9 has_testbench_name, 

10 get_project_source_files, 

11) 

12 

13 

14def test_file_sort_compare_func(): 

15 """Test""" 

16 

17 # -- A shortcut to the tested key function. 

18 key = file_sort_key_func 

19 

20 assert key("a") == key("a") 

21 assert key("A") == key("a") 

22 assert key("a") == key("A") 

23 assert key("A") == key("A") 

24 

25 assert key("a") < key("b") 

26 assert key("A") < key("b") 

27 assert key("a") < key("B") 

28 assert key("A") < key("B") 

29 

30 assert key("b") > key("a") 

31 assert key("B") > key("a") 

32 assert key("b") > key("A") 

33 assert key("B") > key("A") 

34 

35 assert key("b") < key("a/a") 

36 assert key("a/a") > key("b") 

37 

38 assert key("a/a") < key("a/b") 

39 assert key("a/b") > key("a/ ") 

40 

41 assert key(Path("a")) < key(Path("b")) 

42 assert key(Path("b")) > key(Path("A")) 

43 assert key(Path("a")) == key(Path("a")) 

44 assert key(Path("B")) > key(Path("a")) 

45 

46 

47def test_sort_files(): 

48 """Test the sort_files function.""" 

49 

50 assert sort_files([]) == [] 

51 

52 assert sort_files( 

53 [ 

54 "a/a/c", 

55 "a/b/a", 

56 "a/a", 

57 "a/b", 

58 "a", 

59 "b", 

60 "c", 

61 "A/C", 

62 "B/D", 

63 ] 

64 ) == [ 

65 "a", 

66 "b", 

67 "c", 

68 "a/a", 

69 "a/b", 

70 "A/C", 

71 "a/a/c", 

72 "a/b/a", 

73 "B/D", 

74 ] 

75 

76 

77def test_is_source_file(): 

78 """Tests the is_source_file() function.""" 

79 

80 # -- Verilog and system-verilog source names, 

81 assert is_source_file("aaa.v") 

82 assert is_source_file("bbb/aaa.v") 

83 assert is_source_file("bbb\\aaa.v") 

84 assert is_source_file("aaatb.v") 

85 assert is_source_file("aaa_tb.v") 

86 assert is_source_file("aaa.sv") 

87 assert is_source_file("bbb\\aaa.sv") 

88 assert is_source_file("aaa_tb.sv") 

89 

90 # -- Non verilog source names, system-verilog included. 

91 assert not is_source_file("aaatb.vv") 

92 assert not is_source_file("aaatb.V") 

93 assert not is_source_file("aaa_tb.vh") 

94 

95 

96def test_has_testbench_name(): 

97 """Tests the test_is_testbench() function.""" 

98 

99 # -- Testbench names 

100 assert has_testbench_name("aaa_tb.v") 

101 assert has_testbench_name("aaa_tb.out") 

102 assert has_testbench_name("bbb/aaa_tb.v") 

103 assert has_testbench_name("bbb\\aaa_tb.v") 

104 assert has_testbench_name("aaa__tb.v") 

105 assert has_testbench_name("Aaa__Tb.v") 

106 assert has_testbench_name("bbb/aaa_tb.v") 

107 assert has_testbench_name("bbb\\aaa_tb.v") 

108 

109 # -- Non testbench names. 

110 assert not has_testbench_name("aaatb.v") 

111 assert not has_testbench_name("aaa.v") 

112 

113 

114def test_get_source_files(apio_runner): 

115 """Tests the get_source_files() method.""" 

116 

117 with apio_runner.in_sandbox(): 

118 

119 # -- Make files verilog src names (out of order) 

120 Path("bbb.v").touch() 

121 Path("aaa.sv").touch() 

122 

123 # -- Make files with testbench names (out of order) 

124 Path("ccc_tb.v").touch() 

125 Path("aaa_tb.sv").touch() 

126 

127 # -- Make files with non related names. 

128 Path("ddd.vh").touch() 

129 Path("eee.vlt").touch() 

130 

131 # -- Make files in subdirectories. 

132 Path("subdir1").mkdir() 

133 Path("subdir2").mkdir() 

134 Path("subdir1/eee.v").touch() 

135 Path("subdir2/eee_tb.v").touch() 

136 

137 # -- Invoked the tested method. 

138 srcs, testbenches = get_project_source_files() 

139 

140 # -- Verify results. 

141 assert srcs == ["aaa.sv", "bbb.v", join("subdir1", "eee.v")] 

142 assert testbenches == [ 

143 "aaa_tb.sv", 

144 "ccc_tb.v", 

145 join("subdir2", "eee_tb.v"), 

146 ]